Impinj Announces Availability of AEFuse™ Memory – World's First Multi-Time Programmable Fuse in Standard Logic CMOS
February 7, 2005 - Seattle, WA
Impinj, Inc., the fabless semiconductor company whose patented Self-Adaptive Silicon® technology enables its semiconductor intellectual property (IP) business, today announced the availability of Advanced Erasable Fuse, AEFuse™ memory, the silicon-proven, embedded nonvolatile memory cores which provide chip designers with the world's first multiple-times-programmable (MTP) fuse manufacturable in standard logic CMOS processes. The AEFuse product line extends Impinj's IP portfolio, building on the success of the company's higher density AEON™ nonvolatile memory while providing a new architecture ideal for myriad low bit-count storage applications, including trim data for on-chip analog components, encryption and identification information and chip configuration data.
As a reliable and cost-effective alternative to traditional fuse technologies, AEFuse memory provides up to 1000 re-write cycles, providing a more flexible solution for analog and mixed-signal semiconductor companies that require up to a few hundred bits of reprogrammable nonvolatile memory (NVM).
Impinj's AEFuse has been adopted by two of the world's leading mixed-signal chip producers including Analog Devices. "Transfer of intellectual property can be a challenge. We have been impressed with Impinj's ability to meet our high expectations for a smooth transfer of technology. Their exemplary technical support ensures our highest likelihood of success," said Paul Daigle, Product Line Manager, Analog Semiconductor Division at Analog Devices.
AEFuse memory is optimized for small bit-count embedded applications, including on-chip analog trim, product calibration, customer-specific configuration, and encryption key storage. The diverse applications for AEFuse's low cost, nonvolatile storage include LCD drivers (for storing analog calibration data), RF devices such as chips for wireless LAN, RF headsets and RF speakers (for storing system address and identification information) and dedicated-function microcontrollers (for storage of program code) all of which ship over one billion units per year. In an independent survey of 47 companies conducted by Informa Research, 73% of respondents require NVM in their next design, 71% use densities below 16 kilobits and an overwhelming 95% must have an MTP solution because one-time programmable (OTP) memories lack the necessary flexibility. "While traditionally interesting market opportunities for embedded memory IP providers, one-time-use laser-trimmed and polysilicon fuse solutions have inherent technical problems," said Jordan Selburn, principal analyst with market research firm iSuppli Corp. "The ability to deliver a cost effective, multi-time programmable solution without those problems opens up new opportunities in a number of growing markets."
Technical Data and Availability
Available immediately, AEFuse hard IP blocks are silicon-proven and fully characterized in TSMC's 0.25 µm and 0.18 µm logic CMOS processes with qualification underway and expected to complete in the second quarter of 2005. Impinj delivers to licensees physical layout files, simulation models, timing information, and all technical documentation necessary for successful incorporation of AEFuse memory blocks into ongoing chip designs. Users can select from over 100 configurations, including those with on-chip high voltage blocks, oscillator and lock bits. All configurations operate over a temperature range from -40 °C to 125 °C, with 1000 re-write cycles, and 10-year retention.
Impinj (NASDAQ: PI) helps businesses and people analyze, optimize, and innovate by wirelessly connecting billions of everyday things—such as apparel, automobile parts, luggage, and shipments—to the Internet. The Impinj platform uses RAIN RFID to deliver timely data about these everyday things to business and consumer applications, enabling a boundless Internet of Things. www.impinj.com
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