Impinj Announces Semiconductor Industry's First Multi-Time-Programmable NVM IP Qualified in 90-nm Process Technology
AEON®/MTP Qualified in TSMC's 90-Nanometer Process; Logic NVM Moves Two Process Nodes Ahead of Embedded Flash
Seattle, WA March 8, 2007 - Leading logic nonvolatile memory (NVM) intellectual property (IP) supplier, Impinj, Inc., today announced the qualification of the company's AEON®/MTP NVM in the 90-nanometer Logic CMOS manufacturing process at Taiwan Semiconductor Manufacturing Corporation (TSMC).
The first-ever multiple-time-programmable (MTP) NVM IP qualified and released for production at the 90-nanometer process node, Impinj's AEON®/MTP cores provide the cost, power and functionality benefits of embedded NVM in standard logic CMOS (also known as Logic NVM). Unlike older memory technologies, such as embedded Flash, that require additional, expensive manufacturing steps, AEON®/MTP cores integrate easily into system-chips designed in the most advanced and cost-effective processes.
"Many of the most exciting system-chip designs target high-performance 90-nanometer processes, but those designs were unable to reap the feature and functionality advantages of embedded multiple-times-programmable NVM until now," said Larry Morrell, vice president of IP Products at Impinj. "Impinj is delighted to be the first company to address this significant design requirement with Logic NVM IP that is two process nodes ahead of embedded flash offerings."
Embedded in more than 300 million chips, Impinj's AEON/MTP NVM cores retain crucial system information even when power is turned off. Ideal for portable devices, such as multi-function cell phones that require simultaneous storage of several types of system data, AEON/MTP NVM cores store information such as encryption keys for digital rights management, configuration settings for Bluetooth or WiFi connections, custom personalization settings in baseband processors, and precision analog trim values for the audio and display drivers.
The qualified 90-nanometer AEON/MTP NVM IP comprises hard macro cores in 8-bit to 256-bit configurations with parallel data output enabling instant access to all data bits. Additional features include zero-power read operation, integrated high voltage circuitry, 10-year data retention and up to 50,000 write/erase cycles.
An alternative to costly embedded Flash memory and cumbersome off-chip EEPROM, AEON/MTP NVM cores are available for license through Impinj's "Try it Now" six-month free evaluation program.
Impinj leverages deep semiconductor design and process expertise to ensure its portfolio of NVM cores demonstrate the highest levels of performance, reliability and ease of integration for customers. Impinj NVM cores undergo stringent and well-documented quality, performance and manufacturability testing, and are available at the world's leading foundries at 0.25-, 0.18-, 0.13-micron and 90-nanometer technology nodes.
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Thursday, March 8, 2007
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